This invention relates generally to semiconductor devices and integrated circuits. More particularly it relates to the read-only memory (ROM), and the programmable, read-only memory (PROM). ROMs and PROMs store individual binary bits of information in what are termed cells. During functional operation, the binary information is read out of the cells; new information cannot be entered, and the information is non-volatile in the sense that the information is not lost when power is removed.
The information content in a ROM is built in at the factory while the information content in a PROM is, in various ways, under the control of the user. The invention here pertains equally well to ROMs and PROMs, and the work ROM, used alone, will be considered to include both ROMs and PROMs.
A ROM comprises a plurality of parallel work lines, and a plurality of parallel bit lines. The bit lines are perpendicular to the work lines and the general area of eahc intersection of a word line and a bit line, along with any associated circuitry, constitutes a single memory cell. Normally the presence or absence of a conducting semiconductor device, diode or transistor, connecting the word line and the bit line determines the binary "1" or "0" state of the memory cell. The absence of a conducting semiconductor can result from (1) the absence of a complete transistor or diode, or (2) the presence of a high resistance in series with the semiconductor.
Reading out a memory cell requires that the appropriate word line, and the appropriate bit line be selected concurrently. Each word line and each bit line has a line-driving transistor. The transistors are driven by a work decoder and a bit decoder. The decoders have parallel, binary-address inputs, and have separate outputs for each possible binary input.
Many patents relating to ROMs have been issued. Bruce B. Roesner one of the applications here received U.S. Pat. No. 4,424,579, entitled Mask Programmable Read-Only Memory Stacked Above a Semiconductor Substrate. The exposition of the invention here calls upon the material of that invention in showing the area savings to be obtained using the teachings of this invention with the ROM of that invention.
The economic advantage in reducing the area of an integrated circuit, provided line widths and spacings are held constant at an optimum value, is very well known. A ROM is dominated in area by the area of the core which is the total area of all the memory cells.
since each word line and bit line is driven by a line-driving transistor, the minimum spacing between lines in the memory cells is often determined by the widths of the line-driving transistor and its connecting lines. Since the line-driving transistors traverse both dimensions of the core, a reduction in line-driving transistor width and spacing prouces a squared reduction in core area. This invention relates specifically to reducing line-driving transistor width and spacing as no other known patent does.